Hardware Research
MARS: Multi-macro Architecture SRAM CIMBased Accelerator with Co-designed Compressed Neural Networks
Convolutional neural networks (CNNs) play a key
role in deep learning applications. However, the large storage overheads and the substantial computational cost of
CNNs are problematic in hardware accelerators. Computing-inmemory (CIM) architecture has demonstrated great potential
to effectively compute large-scale matrix–vector multiplication.
However, the intensive multiply and accumulation (MAC) operations executed on CIM macros remain bottlenecks for further
improvement of energy efficiency and throughput. To reduce
computational costs, ......